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RISC OS Filebase
Home > Software > Programming > Editors > ARM_Debug

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ARM_Debug

Author cad Licence Unknown Rating No rating yetNo rating yetNo rating yetNo rating yetNo rating yet
Version 1.33, 1st April 2001 URLs Homepage, Download (130 KB)

Introduction

A disassembler, editor, singlestepper and much more.

Details

*Disassembler, editor.
*single/multistepper in 26bit User and 26bit SVC mode.
*Edit directly wimpslots and rammodules (in bytes, words, mnemonics, binary and asci)
*It can place conditional breakpoints in applications and rammodules.
After reaching a breakpoint the values from the registers, flags and memory
can be altered, singlestep through the code and leave the singlestepper with the
last registers, flags and PC counter.
*Step Until (R..=&.. or !&..=&.. or BreakPoint)
*Record all the steps (inc. registers and flags), which can be examined afterwards.
*Trap SWI calls and OS commands (conditionally).
*It has a *Step and a SWI "OS_BreakAddress" call.

RISC OS Compatibility

RISC OS 2no RISC OS 3.1xyes RISC OS 3.5yes
RISC OS 3.6yes RISC OS 3.7xyes RISC OS 4.0xyes
Select 1i9 (4.29)unknown Select 2i3 (4.33)unknown Select 3i3 (4.37)unknown
Select 3i4/Adjust 1i2 (4.39)unknown RISC OS 5.0xunknown   
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Supported Filetypes

FiletypeShort NameDescriptionOriginReadWriteNotes
No filetype support information is currently stored for this entry.
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